Analog Design Engineer at Intel

Expires in 13 days


Job ID: JR0147571
Job Category: Engineering
Primary Location: Hudson, MA US
Other Locations: US, California, Santa Clara
Job Type: College Grad

Analog Design Engineer

Job Description
IPG is looking for an Analog Design Engineer to contribute towards the NextGen Data center.
Responsibilities of this role include, although not limited to:
  • Working in High-Speed IO signaling research Lab, for circuit characterization, Simulation to Post-Si correlation, firmware algorithm development and optimization for performance and power.

The successful candidate will have a strong background in:
  • High speed IO design, transmission line theory, analog front-end building blocks such as transmitters, receivers, Equalizers, Filters, High performance Low-jitter clocking, On-die voltage regulators and references
  • Signal integrity analysis
  • System level modeling (Matlab) skills in addition to operating advanced equipment in the IO Lab; such as Oscilloscopes, Bit Error Rate Tester (BERT), VNA, TDR, Logic Analyzer (LAI)

The ideal candidate will also have willingness to work independently and provide innovative solutions, possess good communication skills, and demonstrate creativity, and discipline.
Qualifications
You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Experience listed below would be obtained through a combination of your schoolwork/classes/research and/or relevant previous job and/or internship experiences. This is an entry level position and will be compensated accordingly.
Minimum Qualifications:
Candidate must have a Masters degree in Electrical Engineering with relevant course work/thesis and 2+ years of experience with:
  • OR -

a PhD degree in Electrical Engineering and acquired experience through academic research in:
  • Analog Front End Design trade-offs (Tx, RX, Clk, LDO, Compensation)
  • Mixed-Signal VLSI circuit design fundamentals
  • HSIO Design and transmission line theory
  • Lab work, HSIO signaling equipment, data collection, analytics, presentation

Availability for limited travel
Preferred Qualifications
  • Matlab
  • Scripting, automation, Excel
  • Lab Data articulation and publication and communication
Inside this Business Group
IP Engineering Group's (IPG) vision Build IPs that power Intel's leadership products and power our customer's silicon. We want to attract & retain talent who get joy in building high quality IP and share our core belief that IP is fundamental to transforming Intel's silicon design process. IPG's guiding principles will be ensuring Quality (Zero Bugs), Customer Obsession (Delight our Customers) and structured Problem Solving. We are a fearless organization transforming IP development.
Other Locations
US, California, Santa Clara
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
USCollege GradJR0147571Hudson
Primary Location: Hudson, MA US

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